The present invention generally relates to current sensing, and more particularly, to a system and method for current sensing which is substantially consistent over device, temperature, and process variations.
Current measurement techniques in electronic devices provide a variety of functions: fault protection, current control, switching, and/or the like. Various types and configurations of current sensors have been developed for current measurement. In such current sensors, it is desirable to restrict variations in device, temperature, process, and aging characteristics of circuit components and parasitic elements. Despite efforts to restrict, variations in such characteristics remain a problem. Further, correcting inaccuracies in sensing the current waveform can require additional printed circuit board (PCB) area and additional components, e.g., discrete resistors, which can increase cost and decrease system efficiency.
With reference to FIG. 1A, a switch mode circuit 100 is illustrated for providing a current to a load device. Circuit 100 includes a pair of switches Q1 and Q2 comprising a p-channel FET (Field Effect Transistor) device and an n-channel FET device, respectively, although both switches Q1 and Q2 could comprise n-channel FET devices as well. The gates of switches Q1 and Q2 are connected to an FET drive circuit 102, while the drains of switches Q1 and Q2 are coupled to a load 104 through various elements, including an inductor L1 and a capacitor C1. FET drive circuit 102 is configured with switches Q1 and Q2 to alternately couple inductor L1 to supply voltage VCC and ground. For example, as illustrated with reference to FIG. 1B, as switch Q1 is turned xe2x80x9conxe2x80x9d, during a time TON, the voltage at a node VSW is high, i.e., connected to supply voltage VCC, causing the current IL1 to ramp upwards within inductor L1. In that the voltage V across an inductor is the product of the inductance L times the change in current over time di/dt, the rate of change of current for inductor L1 can be derived in equations (1) and (2) below:                     V        =                  L          ·                                    ⅆ              i                                      ⅆ              t                                                          (        1        )                                                      ⅆ            i                                ⅆ            t                          =                              (                          Vin              -              Vout                        )                    /          L                                    (        2        )            
During a time TOFF, switch Q2 will turn on, the voltage at a node VSW will go low, resulting in a pulsed waveform switching between approximately zero volts and VCC, and current IL1 will ramp downward through inductor L1, at a rate set forth in equation (3) below:                                           ⅆ            i                                ⅆ            t                          =                  Vout          /          L                                    (        3        )            
Currently, it is difficult to accurately sense this inductor current IL1 without dissipating significant power. Moreover, variations in discrete circuit elements negatively impact accurate current sensing, e.g., variations in temperature, process, and/or the like will have varying effects on the differing discrete circuit elements, which will produce inaccuracy in current sensing. In addition, other current sensing techniques commonly used, such as Rds(ON) sensing techniques of a power device, can have reduced accuracy. For example, FETs can have variations in resistance of about 40% in such Rds(ON) sensing techniques, which decreases the accuracy of current sensing. Other techniques include the placing of an RC network across the inductor, in which the effective series inductance (ESL) of the inductor is used to select the resistance used in the RC network. Unfortunately, the ESL has initial and temperature variations, which lead to inaccuracies in current sensing. Other techniques may utilize a sense resistor for current sensing, but which exhibit power losses, e.g., I2R losses.
Many current sensor applications include the use of current mirror circuits configured with operational amplifiers to provide a sensed current based on a load current. For example, current mirror circuits have included a first resistor of known resistance placed in series with a load device, and have measured the voltage drop across the resistor through use of the operational amplifier and a second resistor to calculate the current passing through the load device, e.g., by knowing the drop across the first resistor and forcing that voltage at both the inverting and non-inverting inputs of the amplifier, a sensed current of known proportion to the load current can be provided at the output of the amplifier. In addition to the difficulty and high costs in fabricating resistors within integrated circuit devices, matching a resistor to the power device is difficult to achieve due to variations in process.
With reference to FIG. 2, another prior art application including a current sensor 200 is illustrated. Current sensor 200 is configured as a basic current mirror circuit as described above, with the first and second resistors being replaced with p-channel transistors QP and QR configured to operate as variable resistive devices. For example, in that MOSFET devices can operate as linear resistors whose value can be controlled and/or varied by overdrive voltage when operating within the triode region, such as is disclosed by Behzad Razavi, DESIGN OF ANALOG CMOS INTEGRATED CIRCUITS (McGraw-Hill 2001), current sensor 200 can use the variable resistor devices QP and QR with an amplifier 202 to mirror a load current ILOAD, and thus provide an output current ISENSE representing a known proportion of load current ILOAD. In particular, current sensor 200 can sense the voltage at node V1, and by forcing the voltage at node V2 to equal the voltage at node V1 through amplifier 202, generate a scaled current through a follower transistor QF, to provide sensed current ISENSE.
However, current sense circuit 200 has various operational deficiencies. For example, current mirror circuit 200 generally requires a high speed amplifier for operational amplifier 202 to force the voltage at node V2 to equal the voltage at node V1, which can be difficult to implement in processes optimized for high voltage power devices, i.e., it is difficult to use high voltage devices in a high speed amplifier. Moreover, during switch mode applications, the voltage at node V1 will equal the voltage at node VSW, including having a pulsed waveform between VCC and ground. Thus, when the voltage at node VSW is low, and thus low at node V1, amplifier 202 will attempt to slew sufficient current to pull the voltage at node V2 to ground, which can amount to a significant amount of current being pulled from current sense circuit 200.
Accordingly, a system and method for more accurate current sensing over device, temperature, and process variations are desired, particularly for applications sensing high di/dt currents.
The present invention includes a system and method for current sensing which is substantially consistent over device, temperature, and process variations. In accordance with one aspect of the present invention, a current sensing system and method are configured to provide a scaled down sense current of a known proportion to a load current being sensed. In an exemplary embodiment of the present invention, an exemplary current sensing system includes a first switch coupled to one or more variable resistive elements, wherein the resistive elements are configured to facilitate scaling of the current output from the first switch. A second switch is coupled to the first switch, wherein the size of the second switch is suitably scaled down relative to the size of the first switch. In addition, both switches can be fabricated using substantially the same process. The resistive elements are configured to scale down the voltage across the first switch, with the scaled down voltage being provided to an input of an amplifier. The amplifier is coupled with the resistive elements and the second switch, and is configured to sense the scaled down voltage across the first switch, and force the voltage across the second switch to be equal to the scaled down voltage across the first switch, such that a current of known proportion to the load current can be provided at the output of the amplifier.
In accordance with another aspect of the present invention, to prevent the amplifier from providing an excessive slewing of current from the second switch to ground during the off period of the current sensing circuit, a driver and timing circuit can be provided. The driver and timing circuit can be configured to decouple a resistive switch connected to the input of the amplifier to prevent the amplifier from excessive slewing when the voltage at the input node is low, e.g., when the first switch is not being driven. In addition, another resistive switch can be configured to facilitate biasing of the amplifier when the first switch is not being driven, i.e., when current sensing circuit is not sensing current. As a result, the current sensing circuit can include the use of low voltage devices with a high voltage overlay in the amplifier to provide for higher speed and accuracy.